MONTREAL AREA - Senior FPGA Design Engineers - Contract or Permanent

[Mario]

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Please forward your resume to debra-***@ic3corp.com
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Responsible for the entire FPGA design effort including partitioning
of FPGA functions & architecting the FPGA system design for a variety
of test and measurement products.

RESPONSIBILITIES:
• Architects FPGA designs based on analysis of product requirements
• Works with other members of the FPGA design team to ensure FPGA
modules are designed in accordance with the product requirements and
defined architecture
• Provides detailed design documentation and functional RTL that other
developers may use in design analysis
• Actively participate in peer design reviews
• Train and mentor junior designers
• Monitor technological advances in the industry and keeps management
informed of opportunities to deploy new technology
• Evaluate tools and processes and suggest opportunities for
improvement

MUSTS:
• BS/EE or equivalent; 5+ years related experience or combination of
education and experience
• At least 5 years of experience in FPGA and test bench design
• 3 years VHDL experience
• Team oriented individual
• EPLD/FPGA design methodology (synthesis/place & route/simulation)
• May represent company as a customer contact regarding significant
technical matters
• Background in Datacom, FiberChannel, Telecom

-----------------------------------------------------
Please forward your resume to debra-***@ic3corp.com
-----------------------------------------------------

[Mario]

for now!

Post by Mario
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Responsible for the entire FPGA design effort including partitioning
of FPGA functions & architecting the FPGA system design for a variety
of test and measurement products.
? Architects FPGA designs based on analysis of product requirements
? Works with other members of the FPGA design team to ensure FPGA
modules are designed in accordance with the product requirements and
defined architecture
? Provides detailed design documentation and functional RTL that other
developers may use in design analysis
? Actively participate in peer design reviews
? Train and mentor junior designers
? Monitor technological advances in the industry and keeps management
informed of opportunities to deploy new technology
? Evaluate tools and processes and suggest opportunities for
improvement
? BS/EE or equivalent; 5+ years related experience or combination of
education and experience
? At least 5 years of experience in FPGA and test bench design
? 3 years VHDL experience
? Team oriented individual
? EPLD/FPGA design methodology (synthesis/place & route/simulation)
? May represent company as a customer contact regarding significant
technical matters
? Background in Datacom, FiberChannel, Telecom
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